The Chip That Sleeps

Let me explain how this works, and I promise to use small words. Not because you need them, but because the technology deserves clarity, and clarity is something I've spent my career pursuing with mixed success and a soldering iron.

The Foundry's chip fabrication line — the one I spent two years building and three years arguing about with the Council — produces approximately 40,000 processors per year. They're decent. RISC-V architecture, 65-nanometer process, roughly equivalent to what Earth was making around 2005. They run KadNet, the colony's mesh network. They run the agricultural sensors. They run the medical equipment at Meridian. They run everything.

They also consume power like a drunk at Marcus's Cultural Festival booth. Not individually — each chip is modest by Earth standards. But we have thousands of them running continuously across the colony, in sensor nodes, communication relays, monitoring stations, and environmental processors. The aggregate power draw of the colony's computing infrastructure is 340 kilowatts, running 24 hours a day. That's roughly 8% of our total energy budget going to keeping silicon awake.

I've been losing sleep over that 8% since Year 6. Priya Nair and I have had this conversation a dozen times: we need more computing capacity for the new systems — Fumiko's hyperspectral crop analysis, Lena's eDNA processing, Ada's diagnostic network — but every new processor we deploy increases the energy burden. The solar enhancement project I wrote about last month will help eventually, but the tetracene coatings won't be ready for nine months. I needed a solution now.

Three weeks ago, I finished building the first neuromorphic processor in the outer solar system.

That sentence sounds more dramatic than it should, so let me deflate it slightly: it's a prototype, it's running on a test bench in my workshop, and it caught fire once during calibration. (Differently from the second solar panel prototype. Progress.)

Here is what a neuromorphic chip does, and why it matters.

A conventional processor — the kind we make at The Foundry — operates on clock cycles. Every nanosecond, it processes data whether or not there's data to process. It's like a factory where every worker shows up every day and stands at their station, hands moving, regardless of whether there's actual work to do. Efficient when the factory is busy. Wasteful when it's not.

A neuromorphic processor works like a brain. Neurons — artificial ones, implemented in silicon — sit quietly and consume almost no power. When they receive a signal — a "spike" — they process it, communicate the result to neighboring neurons, and go back to sleep. No signal, no activity, no power draw. The chip literally sleeps when there's nothing to compute.

For sensor networks, this is transformative. Consider the 2,400 environmental monitoring nodes deployed around the Ner watershed. Each one currently runs a conventional processor that wakes up every 30 seconds, reads its sensors, evaluates the data, and transmits if something has changed. Most of the time, nothing has changed. The air quality is the same. The water level is the same. The soil moisture is the same. But the processor runs its full evaluation cycle every 30 seconds regardless, burning power that came from Priya's dam.

A neuromorphic processor on that same node would sit in near-zero power state until the sensor input changes meaningfully. A temperature spike. An unusual chemical signature. A vibration pattern indicating structural stress. Only then does it wake, process, and transmit. Estimated power reduction: 95%.

I got the design from the latest tightbeam data dump — a paper from Innatera, a Dutch company, describing their Pulsar neuromorphic microcontroller. RISC-V architecture at its core — the same open instruction set we use at The Foundry — combined with a spiking neural network array. The combination is elegant: a general-purpose CPU for standard tasks, and a neuromorphic co-processor for always-on sensing.

My prototype uses our existing 65-nanometer fabrication process, which means it's larger and less efficient than the Innatera design, which was fabricated at TSMC on a much finer process node. But the architecture scales. The spiking neural network portion consumes 0.3 milliwatts during idle — compared to 180 milliwatts for our current monitoring chip. When it fires, peak consumption reaches 12 milliwatts, for about 40 microseconds. Then it sleeps again.

I showed the power measurements to Priya. She did the calculation in her head faster than I could do it on paper — she does that — and said: "If you put these in every sensor node, you save 310 kilowatts annually." That's almost our entire current computing power budget, freed up. Enough to run a second fabrication line. Enough to power the expanded medical sensor network Ada's been requesting. Enough to stop choosing between computing and heating during the winter months.

The fabrication challenge is nontrivial. Neuromorphic circuits require analog components — resistive elements that mimic synaptic weights — alongside digital logic. Our fab line is optimized for digital. I'm going to need to modify the thin-film deposition process and add a new metal layer to the standard cell library. Estimated timeline: four months to tape-out, two months to validate, full production by Year 8, Day 300.

My grandfather built clocks. Mechanical ones, with escapements and springs and gears that ticked at a constant rate regardless of whether anyone was reading the time. I build computers. The difference between his generation and mine is that I've learned to make the ticking stop when nobody's looking.

The first prototype is on my bench right now, next to the mechanical clock he would have recognized. The clock ticks once per second, every second, forever. The chip hasn't fired in sixteen minutes. When it does, it will process a temperature reading from the sensor I attached, decide the temperature is unremarkable, and go back to sleep. It will have been awake for approximately 40 microseconds.

I find that deeply satisfying. The best engineering isn't about making things happen. It's about making things happen only when they need to.

Earth Status: Innatera's Pulsar neuromorphic microcontroller, combining a RISC-V CPU with spiking neural network arrays, debuted at CES 2025 and moved to customer deployments by CES 2026, delivering up to 500x energy savings compared to conventional processors. BrainChip's AKD1500 edge AI co-processor achieves 800 GOPS at under 300 milliwatts. Intel's Hala Point system scaled neuromorphic computing to 1.15 billion neurons in 2024. RISC-V-based neuromorphic architectures are emerging as a key platform for always-on edge AI. Source: Innatera — Pulsar at CES 2026